View FAN6791_4468619.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

april 2009 ? 2008 fairchild semiconductor corporation www.fairchildsemi.com FAN6791 / fan6793 ? rev. 1.0.2 FAN6791 / fan6793 ? highly integrated, dual-pwm combination controller FAN6791 / fan6793 highly integrated, dual-pwm combination controller features ? high-voltage startup ? low operating current ? interleaved stand-by pwm / forward pwm switching ? green mode stand-by pwm / forward pwm ? linearly decreasing stand-by pwm frequency to 20khz ? remote on / off ? ac brownout protection ? forward pwm with soft-start ? frequency hopping to reduce emi emissions ? cycle-by-cycle current limiting for stand-by pwm / forward pwm ? leading-edge blanking for stand-by pwm / forward pwm ? synchronized slope compensation for stand-by pwm / forward pwm ? gate output maximum voltage clamp ? v dd over-voltage protection (ovp) ? v dd under-voltage lockout (uvlo) ? internal open-loop protection for stand-by pwm / forward pwm ? constant power limit for stand-by pwm / forward pwm applications general-purpose switch-mode power supplies and flyback power converters, including: ? pc-atx power supplies description the highly integrated FAN6791/3 dual pwm combination controller provides several features to enhance the performance of converters. to minimize standby power consumption, a proprietary green-mode function provides off-time modulation to linearly decrease the switching frequency at light-load conditions. to avoid acoustic-noise problems, the minimum pwm frequency is set above 20khz. this green-mode function enables the power supply to meet international power conservation requirements. with the internal high-voltage startup circuitry, the power loss due to bleeding resistors is also eliminated. to further reduce power consumption, FAN6791/3 is manufactured using the cmos process, which allows an operating current of only 6ma. FAN6791/3 integrates a frequency-jittering function internally to reduce emi emissions of a power supply with minimum line filters. the built-in synchronized slope compensation achieves stable peak-current-mode control. the proprietary internal line compensation ensures constant output power limit. FAN6791/3 provides many protection functions, including brownout protection, cycle-by-cycle current limiting, and an internal open-loop protection circuit to ensure safety should an open-loop or output short- circuit failure occur. pwm output is disabled until v dd drops below the uvlo lower limit when the controller restarts. as long as v dd exceeds ~24.5v, the internal ovp circuit is triggered.
? 2008 fairchild semiconductor corporation www.fairchildsemi.com FAN6791 / fan6793 ? rev. 1.0.2 2 FAN6791 / fan6793 ?highly integrated, dual-pwm combination controller ordering information part number opwm maximum duty operating temperature range eco status package packing method FAN6791ny 48% -40c to +105c green 16-pin dual in-line package (dip) tube fan6793ny 65% -40c to +105c green 16-pin dual in-line package (dip)) tube FAN6791my 48% -40c to +105c green 16-pin small out-line package (sop) tape & reel fan6793my 65% -40c to +105c green 16-pin small out-line package (sop) tape & reel for fairchild?s definition of ?green? eco status, please visit: http://www.fairchildsemi.com/company/green/rohs_green.html . application diagram figure 1. typical application
? 2008 fairchild semiconductor corporation www.fairchildsemi.com FAN6791 / fan6793 ? rev. 1.0.2 3 FAN6791 / fan6793 ? highly integrated, dual-pwm combination controller block diagram figure 2. function block diagram pattern generator
? 2008 fairchild semiconductor corporation www.fairchildsemi.com FAN6791 / fan6793 ? rev. 1.0.2 4 FAN6791 / fan6793 ? highly integrated, dual-pwm combination controller marking information figure 3. top mark pin configuration figure 4. pin configuration (top view ) f ? fairchild logo z ? plant code x ? 1-digit year code y ? 1-digit week code tt ? 2-digit die run code t ? package type (n:dip, m:sop) p ? y: green package m ? m anufacture flow code
? 2008 fairchild semiconductor corporation www.fairchildsemi.com FAN6791 / fan6793 ? rev. 1.0.2 5 FAN6791 / fan6793 ? highly integrated, dual-pwm combination controller pin definitions pin # name description 1 hv for startup , this pin is pulled high to the line input or bulk capacitor via resistors. 2 nc no connection. 3 gnd ground . 4 ri oscillator setting . one resistor connected between ri and ground pins determines the switching frequency (resistance between 12 ~ 47k ? is recommended). the switching frequency is equal to [1560 / ri]khz, where ri is in k . for example, if ri is equal to 24k , then the switching frequency is 65khz. 5 fbfyb voltage feedback for flyback pwm stage . it is internally pulled high through a 6.5k resistor. an external opto-coupler from secondary feedback circuit is usually connected to this pin. 6 ifyb pwm current sense for flyback pwm stage . the sensed voltage is used for peak-current- mode control and cycle-by-cycle current limiting. 7 fbpwm voltage feedback for forward pwm stage . it is internally pulled high through a 6.5k resistor. an external opto-coupler from secondary feedback circuit is usually connected to this pin. 8 ipwm pwm current sense for forward pwm stage . via a current sense resistor, this pin provides the control input for peak-current-mode control and cycle-by-cycle current limiting. 9 vref reference voltage . this pin can provide a reference voltage 5v. 10 ss pwm soft-start . during startup, the ss pin charges an external capacitor with a 20a constant current source. the voltage on fbpwm is clamped by ss during startup. in the event of a protection condition occurring and/or forward pwm being disabled, the ss pin quickly discharges. 11 on/off pwm remote on/off . active high. the forward pwm is disabled whenever the voltage at this pin is lower than 0.8v or the pin is open. 12 pgnd ground . the power ground. 13 opwm forward pwm gate drive . the totem-pole output drive for the forward pwm mosfet. this pin is internally clamped under 16v to protect the mosfet. 14 vdd power supply . the internal protection circuit disables pwm output as long as v dd exceeds the ovp trigger point. 15 ofyb flyback pwm gate drive . the totem-pole output drive for the forward pwm mosfet. this pin is internally clamped under 16v to protect the mosfet. 16 vrms line-voltage detection . the pin is used for line compensation, for forward, and brownout protection.
? 2008 fairchild semiconductor corporation www.fairchildsemi.com FAN6791 / fan6793 ? rev. 1.0.2 6 FAN6791 / fan6793 ? highly integrated, dual-pwm combination controller absolute maximum ratings stresses exceeding the absolute maximum ratings may damage the device. the device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. in addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. the absolute maximum ratings are stress ratings only. all voltage values, except differential voltage, are given with respect to gnd pin. stresses beyond those listed under ?absolute maximum ratings ?may cause permanent damage to the device. symbol parameter min. max. unit v dd dc supply voltage 27 v v hv input voltage to hv pin 500 v v high opwm, ofyb, on/off -0.3 27.0 v v low others -0.3 7.0 v p d power dissipation (t a < 50c) 800 c/w t j operating junction temperature -40 +125 c t stg storage temperature range -55 +150 c r j-a thermal resistance (junction-to-case) 82.5 c/w t l lead temperature (wave soldering, 10 seconds) +260 c human body model , jedec:jesd22-a114 (all pins except hv pin) 3.5 esd charged device model , jedec:jesd22-c101 (all pins except hv pin) 1.5 kv recommended operating conditions the recommended operating conditions table defines the conditions for actual device operation. recommended operating conditions are specified to ensure optimal performance to the datasheet specifications. fairchild does not recommend exceeding them or designing to absolute maximum ratings. symbol parameter min. max. unit t a operating ambient temperature -40 +105 c
? 2008 fairchild semiconductor corporation www.fairchildsemi.com FAN6791 / fan6793 ? rev. 1.0.2 7 FAN6791 / fan6793 ? highly integrated, dual-pwm combination controller electrical characteristics v dd =18v; r i =24k ? ;t a = 25c, unless noted. symbol parameter conditions min. typ. max. units v dd section v dd-op continuously operating voltage 22 v i dd st startup current v dd ? 0.16v 10 50 a i dd-op1 operating current 1 v dd =15v, gate open 6 10 ma i dd-op2 operating current 2 v dd =15v, gate open, i ref =10ma 16 20 ma v th-on start threshold voltage 15 16 17 v v th-off minimum operating voltage 9 10 11 v v th-olp i dd-olp off voltage 6.5 7.5 8.0 v i th-olp internal sink current v th-olp +0.1v 70 80 100 a v dd-ovp v dd over-voltage protection (turn off pwm with delay) 23.4 24.5 25.5 v t ovp v dd over-voltage protection debounce v dd-ovp =26v 80 100 120 s hv i d maximum input current v ac =90v(v dc =120v), v dd =10f 1.5 2.5 3.5 ma i hv-cs internal current source hv=500v,v dd =15v 10 50 a oscillator and green-mode operation v ri ri voltage 1.176 1.200 1.224 v center frequency, r i =24k ? 62 65 68 f osc normal pwm frequency jitter range 3.7 4.2 4.7 khz f osc-g-min minimum frequency in green mode r i =24k ? 18 20 22 khz ri ri range 12 24 47 k ? ri open ri pin open protection if ri > ri open , pwm turned off 1 m ? ri short ri pin short protection if ri > ri short , pwm turned off 6 k ? v rms for ac brownout protection v rms-off off threshold voltage for ac brownout protection 0.75 0.80 0.85 v v rms-on start threshold voltage for ac brownout protection v rms-uvp-1 +0.17 v rms-uvp-1 +0.19 v rms-uvp-1 +0.21 v t rms ac brownout protection debounce time r i =24k ? 150 195 240 ms vref v ref reference voltage i ref =1ma, c ref =0.1f 4.75 5.00 5.25 v v ref1 load regulation of reference voltage c ref =0.1f, i ref =1ma to 10ma 80 mv v ref2 line regulation of reference voltage c ref =0.1f, v dd =12v to 22v 25 mv i ref_max maximum current 10 15 ma i os output short circuit 15 20 25 ma
? 2008 fairchild semiconductor corporation www.fairchildsemi.com FAN6791 / fan6793 ? rev. 1.0.2 8 FAN6791 / fan6793 ? highly integrated, dual-pwm combination controller electrical characteristics v dd =18v; r i =24k ? ;t a = 25c, unless noted. symbol parameter conditions min. typ. max. units on/off r on/off impedance on/off pin 50 100 k ? v on high threshold level of synchronizing signal 2.4 3.0 3.6 v v off low threshold level of synchronizing signal 0.8 1.0 1.2 v over temperature protection (otp) t off protection junction temperature (1) 130 140 +150 c t restart restart junction temperature (2) 100 110 +120 c flyback pwm stage fbfyb feedback input a v-fly fb input to current comparator attenuation 1/3.75 1/3.20 1/2.75 v/v z fb input impedance 4 5 7 k ? v hgh output high voltage fb pin open 5.0 5.2 v v fb-olp fb open-loop trigger level 4.2 4.5 4.8 v t olp fb open-loop protection delay 53 56 59 ms v n green mode entry fb voltage 2.4 2.5 2.6 v s g slope of green-mode modulation 60 75 90 hz/mv v g green mode ending fb voltage 1.8 1.9 2.0 v v oz-ofyb v fbpwm for zero duty cycle (forward turn on) 1.2 1.3 1.4 v ifyb current sense z cs input impedance 12 k ? v limit1 peak current limit threshold voltage 1 v rms =1v 0.75 0.80 0.85 v v limit2 peak current limit threshold voltage 2 v rms =1.5v v limit1 -0.1 v t pd propagation delay to gate output v dd =15v, ofyb drops to 9v 60 120 ns t bnk leading-edge blanking time 200 270 350 ns v slope slope compensation duty=dcy max 0.34 0.37 0.41 v v s-scp threshold voltage for sense short-circuit protection 0.1 0.15 0.2 v t d-sscp delay time for sense short- circuit protection v sense <0.15v, r i =24k ? 100 180 240 s ofyb-gate driver v ofyb-clamp flyback pwm gate output clamping voltage v dd =22v 16 18 v v ol-ofyb output voltage low v dd =15v; i o =20ma 1.5 v v oh-ofyb output voltage high v dd =12v; i o =20ma 8 v t r-ofyb rising time v dd =15v; gate=1nf; gate=2~9v 30 60 120 ns t f-ofyb falling time v dd =15v; gate=1nf; gate=9~2v 30 50 90 ns dcy max-ofyb maximum duty cycle 60 65 70 %
? 2008 fairchild semiconductor corporation www.fairchildsemi.com FAN6791 / fan6793 ? rev. 1.0.2 9 FAN6791 / fan6793 ? highly integrated, dual-pwm combination controller electrical characteristics v dd =18v; r i =24k ? ;t a = 25c, unless noted. symbol parameter conditions min. typ. max. units forward pwm stage fbpwm-feedback input a v fb to current comparator attenuation 1/3.2 1/2.7 1/2.2 v/v z fb input impedance 4 5 7 k ? v hgh output high voltage fb pin open 5.0 5.2 v v open-pwm pwm open-loop protection voltage 4.2 4.5 4.8 v t open-pwm- hiccup interval of pwm open-loop protection reset r i =24k ? 500 600 700 ms t open-pwm pwm open-loop protection delay time r i =24k ? 80 95 120 ms v oz-opwm v fbpwm for zero duty cycle 1.2 1.3 1.4 v ipwm-current sense t pd propagation delay to output ? v limit loop v dd =15v, opwm drops to 9v 60 120 ns v limit1 peak current limit threshold voltage 1 v rms =1v 0.75 0.80 0.85 v v limit2 peak current limit threshold voltage 2 v rms =1.5v v limit1 -0.1 v t bnk leading-edge blanking time 270 350 450 ns v slope slope compensation v s = v slope x (t on /t) v s : compensation voltage added to current sense 0.40 0.45 0.55 v opwm-gate driver v opwm-clamp output voltage maximum (clamp) v dd =22v 16 18 v v ol output voltage low v dd =15v; i o =100ma 1.5 v v oh output voltage high v dd =13v; i o =100ma 8 v t r rising time v dd =15v; c l =5nf; o/p=2v to 9v 30 60 120 ns t f falling time v dd =15v; c l =5nf; o/p=9v to 2v 30 50 110 ns FAN6791 maximum duty cycle 47 48 49 dcy max-opwm fan6793 maximum duty cycle r i =24k 60 65 70 % soft start i ss constant current output for soft-start r i =24k 17 20 23 a r d discharge resistance 470 564 notes: 1. when activated, the output is disabled and the latch is turned off. 2. this is the threshold temperature for enabling the output again and resetting the latch after over-temperature protection has been activated.
? 2008 fairchild semiconductor corporation www.fairchildsemi.com FAN6791 / fan6793 ? rev. 1.0.2 10 FAN6791 / fan6793 ? highly integrated, dual-pwm combination controller typical characteristics 0.0 1.0 2.0 3.0 4.0 5.0 6.0 7.0 8.0 9.0 10.0 -40 -25 -10 5 20 35 50 65 80 95 110 125 iddst(ua) 0.0 1.0 2.0 3.0 4.0 5.0 6.0 7.0 8.0 9.0 10.0 -40 -25 -10 5 20 35 50 65 80 95 110 125 iddop1(ua) figure 5. startup current i dd-st vs. temperature figure 6. i dd-op1 vs. temperature 10.0 11.0 12.0 13.0 14.0 15.0 16.0 17.0 18.0 19.0 20.0 -40 -25 -10 5 20 35 50 65 80 95 110 125 iddop2(ua) 0.0 0.5 1.0 1.5 2.0 2.5 -40 -25 -10 5 20 35 50 65 80 95 110 125 idmax(ua) figure 7. i dd-op2 vs. temperature figure 8. i d-max vs. temperature 15.5 15.6 15.7 15.8 15.9 16.0 16.1 16.2 -40 -25 -10 5 20 35 50 65 80 95 110 125 vddon(v) 9.2 9.3 9.4 9.5 9.6 9.7 9.8 9.9 10.0 10.1 10.2 -40 -25 -10 5 20 35 50 65 80 95 110 125 vddoff(v) figure 9. v dd-on vs. temperature figure 10. v dd-off vs. temperature 47.10 47.15 47.20 47.25 47.30 47.35 47.40 47.45 47.50 -40 -25 -10 5 20 35 50 65 80 95 110 125 opwm max duty(%) 63.3 63.4 63.5 63.6 63.7 63.8 63.9 64.0 64.1 64.2 64.3 64.4 -40 -25 -10 5 20 35 50 65 80 95 110 125 ofyb max duty(% ) figure 11. opwm maximum duty cycle vs. temperature figure 12. ofyb maximum duty cycle vs. temperature
? 2008 fairchild semiconductor corporation www.fairchildsemi.com FAN6791 / fan6793 ? rev. 1.0.2 11 FAN6791 / fan6793 ? highly integrated, dual-pwm combination controller typical characteristics 31.70 31.75 31.80 31.85 31.90 31.95 32.00 32.05 32.10 -40 -25 -10 5 20 35 50 65 80 95 110 125 tr opwm(ns) 53.5 54.0 54.5 55.0 55.5 56.0 56.5 57.0 57.5 -40 -25 -10 5 20 35 50 65 80 95 110 125 tf opwm(ns) figure 13. rising time t r-opwm vs. temperature figure 14. falling time t f-opwm vs. temperature 25.8 26.0 26.2 26.4 26.6 26.8 27.0 27.2 27.4 -40 -25 -10 5 20 35 50 65 80 95 110 125 tr ofyb(ns ) 30 31 32 33 34 35 36 37 38 39 -40 -25 -10 5 20 35 50 65 80 95 110 125 tf ofyb(ns ) figure 15. rising time t r-ofyb vs. temperature figure 16. falling time t f-ofyb vs. temperature 0.788 0.790 0.792 0.794 0.796 0.798 0.800 0.802 -40 -25 -10 5 20 35 50 65 80 95 110 125 ipwm vlimit(v) vrms=1v 0.659 0.660 0.661 0.662 0.663 0.664 0.665 0.666 0.667 -40 -25 -10 5 20 35 50 65 80 95 110 125 ipwm vlimit(v) vrms=1.5v figure 17. i pwm-vlimit (v rms =1v) vs. temperature figure 18. i pwm-vlimit (v rms =1.5v) vs. temperature 0.780 0.785 0.790 0.795 0.800 0.805 0.810 0.815 -40 -25 -10 5 20 35 50 65 80 95 110 125 ifyb vlimit(v) vrms=1 v 0.643 0.644 0.645 0.646 0.647 0.648 0.649 0.650 0.651 0.652 0.653 -40 -25 -10 5 20 35 50 65 80 95 110 125 ifyb vlimit(v) vrms=1.5 v figure 19. i fyb-vlimit (v rms =1v) vs. temperature figure 20. i fyb-vlimit (v rms =1.5v)vs. temperature
? 2008 fairchild semiconductor corporation www.fairchildsemi.com FAN6791 / fan6793 ? rev. 1.0.2 12 FAN6791 / fan6793 ? highly integrated, dual-pwm combination controller typical characteristics 65.5 65.6 65.7 65.8 65.9 66.0 66.1 -40 -25 -10 5 20 35 50 65 80 95 110 125 opwm freqency(hz ) 65.6 65.7 65.8 65.9 66.0 66.1 66.2 66.3 -40 -25 -10 5 20 35 50 65 80 95 110 125 ofyb frequncy(hz figure 21. opwm frequency vs . temperature figure 22. ofyb frequency vs. temperature
? 2008 fairchild semiconductor corporation www.fairchildsemi.com FAN6791 / fan6793 ? rev. 1.0.2 13 FAN6791 / fan6793 ? highly integrated, dual-pwm combination controller functional description the highly integrated FAN6791 / fan6793 dual-pwm combination controller provides several features to enhance the performance of converters. proprietary interleave switching synchronizes the flyback and forward pwm stages. this reduces switching noise. the proprietary frequency jittering function for the flyback and forward pwm stages helps reduce switching emi emissions. for the flyback and forward pwm, the synchronized slope compensation ensures the stability of the current loop under continuous-mode operation. in addition, FAN6791/3 provides complete protection functions, such as brownout protection and ri open/short. startup current for startup, the hv pin is connected to the line input or bulk capacitor through external resistor rhv, recommended as 100k ? . typical startup current drawn from pin hv is 2ma and it charges the hold-up capacitor through the resistor rhv. when the v dd capacitor level reaches v dd-on , the startup current switches off. at this moment, the v dd capacitor only supplies the FAN6791/3 to maintain the v dd before the auxiliary winding of the main transformer provides the operating current. oscillator operation a resistor connected from the ri pin to the gnd pin generates a constant current source for the FAN6791/3 controller. this current is used to determine the center pwm frequency. increasing the resistance reduces pwm frequency. using a 24k ? resistor results in a corresponding 65khz pwm frequency. the switching frequency is programmed by the resistor r i connected between ri pin and gnd. the relationship is: ) khz ( ) (k r 1560 f i pwm = (1) the range of the pwm oscillation frequency is designed as 33khz ~ 130khz. FAN6791/3 integrates frequency hopping function internally. the frequency variation ranges from around 61khz to 69khz for a center frequency 65khz. the frequency hopping function helps reduce emi emission of a power supply with minimum line filters. for power saving, flyback pwm stage has a green mode function. frequency linearly decreases when v fb is within v g and v n . once v fb is lower than v g , switching frequency disables, and it enters burst mode. figure 23. oscillation frequency in green mode line voltage detection (v rms ) figure 24 shows a resistive divider with low-pass filtering for line-voltage detection on vrms pin. the v rms voltage is used for the pfc multiplier and brownout protection. for brownout protection, when the v rms voltage drops below 0.8v, opfc turns off. figure 24. line-voltage detection on vrms pin remote on/off figure 25 shows the remote on / off function. when the supervisor fpo pin pulls down and enables the system by connecting an opto-coupler, v ref applies to the on/off pin to enable forward pwm stage. figure 25. remote on/off
? 2008 fairchild semiconductor corporation www.fairchildsemi.com FAN6791 / fan6793 ? rev. 1.0.2 14 FAN6791 / fan6793 ? highly integrated, dual-pwm combination controller interleave switching the FAN6791/3 uses interleaved switching to synchronize the stand-by pwm / forward pwm stages. this reduces switching noise and spreads the emi emissions. figure 26 shows that an off-time t off is inserted in between the turn-off of the stand-by gate drives and the turn-on of the forward pwm. figure 26. interleaved switching slope compensation the stand-by pwm and forward pwm stage are designed for flyback and forward power converters. peak-current-mode control is used to optimize system performance. slope compensation is added to stabilize the current loop. the FAN6791/3 inserts a synchronized, positively sloped ramp at each switching cycle. the positively sloped ramp is represented by the voltage signal v s-comp in figure 27. figure 27. slope compensation gate drivers FAN6791/3 output stages are fast totem-pole gate drivers. the output driver is clamped by an internal 18v zener diode to protect the power mosfet. constant power control to limit the output power of the converter constantly, a power-limit function is included. sensing the converter input voltage through the vrms pin, the power limit function generates a relative p eak-current-limit threshold voltage for constant power control, as shown in figure 28. figure 28. constant power control protections the FAN6791/3 provides full protection functions to prevent the power supply and the load from being damaged. the protection features include: v dd over-voltage protection . the stand-by pwm and forward pwm stages will be disabled whenever the vdd voltage exceeds the over-voltage threshold. ac under-voltage protection. the vrms pin is used to detect the ac input voltage. when voltage is lower than the brownout threshold, voltage disables both forward and stand-by pwm. ri pin open / short protection . the ri pin is used to set the switching frequency and internal current reference. the stand-by pwm and forward pwm stages are disabled whenever the ri pin is short or open. open-loop protection . the stand-by pwm and forward pwm stages of FAN6791/3 is disabled whenever the fbfyb / fbpwm pin is open.
? 2008 fairchild semiconductor corporation www.fairchildsemi.com FAN6791 / fan6793 ? rev. 1.0.2 15 FAN6791 / fan6793 ? highly integrated, dual-pwm combination controller reference circuit figure 29. reference circuit
? 2008 fairchild semiconductor corporation www.fairchildsemi.com FAN6791 / fan6793 ? rev. 1.0.2 16 FAN6791 / fan6793 ? highly integrated, dual-pwm combination controller bom list reference component reference component c1 c/0.47f/x2 r18 r/100 1/8w c2 c/0.47f/x2 r20 r/1/1w c3 c/471p/50v r21 r/1 1/8w c4 c/471p/50v r22 r/402 1/8w c5 c/102p/50v r23 r/47k 3w c6 c/102p/50v r24 r/10k 1/8w c7 c/102p/50v r26 r/2k 1/8w c8 c/472/400v r29 r/470 1/8w c9 c/472/400v r31 r/0.1/2w c10 c/102p/50v r35 r/n.a 1/4w c11 c/10f/50v r37 r/20k 1% 1/8w c12 c/104p/50v r38 r/20k 1% 1/8w c20 c/102p/1kv q1 2n/60 c21 c/470f/200v q2 9n90 c22 c/470f/200v z3 7d271 c23 c/103p/1kv z2 7d271 c24 c/1000f/10v z1 7d561 c25 c/330f/10v d1 d/1n4007 c28 c/103p/50v d2 d/uf107 r1 r/680k 1/4w nc d3 d/sb540 r2 r/680k 1/4w d4 d/uf1007 r3 r/51.1k 1/4w bd1 d/6a/600v r4 r/51.1k 1/4w u1 sg6791/3 r5 r/2.4m 1/4w u2 pc-817 r6 r/2.4m 1/4w u3 tl431 r7 r/24k 1/8w u6 pc-817 r8 r/1k 1/8w r9 r/19.1k 1/8w r10 r/1k 1/8w r13 r/100k 1/2w r14 r/10 1/8w r15 r/10 1/8w r17 r/100 1/8w
? 2008 fairchild semiconductor corporation www.fairchildsemi.com FAN6791 / fan6793 ? rev. 1.0.2 17 FAN6791 / fan6793 ? highly integrated, dual-pwm combination controller physical dimension 16 9 8 1 notes: unless otherwise specified a this package conforms to jedec ms-001 variation bb b) all dimensions are in millimeters. d) conforms to asme y14.5m-1994 e) drawing file name: n16erev1 19.68 18.66 6.60 6.09 c) dimensions are exclusive of burrs, mold flash, and tie bar protrusions 3.42 3.17 3.81 2.92 (0.40) 2.54 17.78 0.58 0.35 1.78 1.14 5.33 max 0.38 min 8.13 7.62 0.35 0.20 15 0 8.69 a a top view side view figure 30. 16-pin dual in-line package (dip) package drawings are provided as a service to customers considering fairchild components. drawings may change in any manner without notice. please note the revision and/or date on the drawing and contact a fairchild semiconductor representative to ver ify or obtain the most recent revision. package specifications do not expand the terms of fairchild?s worldwide terms and conditions, specifically the warranty therein, which covers fairchild products. always visit fairchild semiconductor?s online packaging area for the most recent package drawings: http://www.fairchildsemi.com/packaging/
? 2008 fairchild semiconductor corporation www.fairchildsemi.com FAN6791 / fan6793 ? rev. 1.0.2 18 FAN6791 / fan6793 ? highly integrated, dual-pwm combination controller physical dimensions (continued) figure 31. 16-pin small outline package (soic) package drawings are provided as a service to customers considering fairchild components. drawings may change in any manner without notice. please note the revision and/or date on the drawing and contact a fairchild semiconductor representative to ver ify or obtain the most recent revision. package specifications do not expand the terms of fairchild?s worldwide terms and conditions, specifically the warranty therein, which covers fairchild products. always visit fairchild semiconductor?s online packaging area for the most recent package drawings: http://www.fairchildsemi.com/packaging/
? 2008 fairchild semiconductor corporation www.fairchildsemi.com FAN6791 / fan6793 ? rev. 1.0.2 19 FAN6791 / fan6793 ? highly integrated, dual-pwm combination controller

▲Up To Search▲

Price & Availability of FAN6791

	To Download FAN6791 Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .